A 5-stage pipelined LC-2K processor simulator written in C, with full data forwarding, load-use hazard detection and stall injection, and branch-misprediction flushing — cycle-accurate against reference traces.
Around the simulator sits the supporting toolchain: a two-pass assembler that emits object files with symbol and relocation tables, a multi-file linker that resolves global symbols and patches relocations, and a configurable set-associative cache simulator with LRU replacement and a write-back / write-allocate policy.